The 8421 code is the name of mainland China, and the 8421 code is the most commonly used one in the BCD code. In this encoding mode, each binary code 1 represents a fixed value, and the decimal number represented by 1 is added up, and the result is the decimal number it represents. Since 1 in each bit of the code from left to right represents 8, 4, 2, 1, respectively, this code is called the 8421 code. The decimal number represented by 1 for each bit is called the weight of this bit. The weight of each bit in the 8421 code is fixed.
Decimal600, 3/5, - 7.99... Looking at these familiar numbers, have you thought too much? In fact, this is the world-wide decimal, that is, 1. Full ten into one, full twenty into two, and so on... 2. According to the right, the first right is 10^0, the second is 10^1 ... and so on, the Nth bit 10^(N-1), the value of the number is equal to the value of each bit * the sum of the weights corresponding to the bit.
8421 code conversion decimal program
8421 code decimal counter:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY GKY07P10 IS
PORT(clk,reset:IN STD_LOGIC;
q:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END GKY07P10;
ARCHITECTURE struc OF GKY07P10 IS
SIGNAL q_temp: STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
PROCESS(clk)
BEGIN
IF(clk'EVENT AND clk='1')THEN
IF reset='1'THEN q_temp“=“0000â€;
ELSIF q_temp=“1001†THEN
Q_temp"="0000";
ELSE
Q_temp"=q_temp+1;
END IF;
END IF;
END PROCESS;
q "=q_temp;
END struc;
From state '0000' to state '1001' and then back to '0000', the asynchronous reset is reset immediately.
Divider:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY GKY07P13 IS
PORT(clk,clear:IN STD_LOGIC;
Clk_out:OUT STD_LOGIC);
END GKY07P13;
ARCHITECTURE struc OF GKY07P13 IS
SIGNAL temp: INTEGER RANGE 0 TO 11;
BEGIN
P1:PROCESS(clear,clk)
BEGIN
IF clear='0' THEN
Temp"=0;
ELSIF clk'EVENT AND clk='1' THEN
IF temp=11 THEN
Temp"=0;
ELSE
Temp"=temp+1;
END IF;
END IF;
END PROCESS p1;
P2:PROCESS(temp)
BEGIN
IF temp "6 THEN
Clk_out"='0';
ELSE
Clk_out"='1';
END IF;
END PROCESS p2;
END struc;
A very important device, but the design is not very difficult, first the module is 12 counts, then the duty cycle is 50%.
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY LED IS
PORT(a:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
b: OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END LED;
ARCHITECTURE LEDarch OF LED IS
BEGIN
PROCESS(a)
BEGIN
CASE a IS
WHEN "0000" = " b " = "1111110"; --0
WHEN "0001" = " b " = "0110000"; --1
WHEN "0010" = " b " = "1101101"; --2
WHEN "0011" = " b " = "1111001"; --3
WHEN "0100" = " b " = "0110011"; --4
WHEN "0101" = " b " = "1011011"; --5
WHEN "0110" = " b " = "1011111"; --6
WHEN "0111" = " b " = "1110000"; --7
WHEN "1000" = "b" "="1111111"; --8
WHEN "1001" = " b " = "1111011"; --9
WHEN Others =》 b <<=“0000000â€;
END CASE;
END PROCESS;
END;
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