Single-cycle control scheme based on bridgeless APFC circuit

0 Preface

With the development of power electronics technology, non-linear loads such as rectifiers and switching power supplies in the power grid continue to increase. These impactful electrical equipment will cause serious distortion of the input current on the grid side, resulting in a large amount of harmonic pollution, resulting in a low power factor of the grid, so it is imperative to increase the power factor.

Early power factor correction was achieved by adding a filter inductor and capacitor after the rectifier. The power factor was generally only about 0.6. In the 1990s, active power factor correction (APFC) was generated by connecting a DC/DC switch between the rectifier and the load. The basic principle of the converter is to force the AC input current waveform to track the AC input voltage waveform through the control circuit, thereby realizing the sinusoidal of the AC current waveform and synchronizing with the AC input voltage waveform, and the power factor can be increased to above 0.99.

1 APFC circuit topology

1.1 Traditional Bridged APFC Topology

The traditional Boost APFC circuit consists of a rectifier bridge and a PFC, as shown in Figure 1. There are three semiconductor jobs in the flow path during operation, and the power factor is low. When the converter power and switching frequency increase, the system on-state loss increases significantly, the overall efficiency is low, and the control circuit is more complicated.

Figure 1 Traditional Boost APFC circuit

1.2 Basic Bridgeless APFC Topology

In view of the traditional bridge circuit problem, this paper proposes a bridgeless circuit that can improve PF and low on-state loss, as shown in Figure 2. Table 1 compares the bridged topology with the bridgeless topology.

Bridgeless Boost APFC circuit

As seen in Table 1, the bridgeless APFC saves one diode compared to the bridged APFC when the MOSFET is turned on and off. After theoretical calculations, the bridgeless topology APFC can increase the efficiency by about 1% at full power input. And the bridgeless topology is more conducive to circuit integration. However, the basic bridgeless Boost APFC circuit has serious problems of common mode interference and current sampling.

Comparison of devices without bridge Boost APFC and traditional Boost APFC

1.3 Dual Diode Bridgeless APFC Topology

In order to solve the problem that the basic bridgeless boost APFC circuit has severe EMI and difficult current sampling, the basic bridgeless boost APFC circuit is improved. As shown in Figure 3, two fast recovery diodes VD3 and VD4 are added to the basic bridgeless boost APFC circuit. .

Figure 3 Dual Diode Boost APFC

In Figure 3, the resistor Rs is the current sense resistor in the inductor, which reduces the current sense circuit. Although Rs will cause some loss during operation, as long as the resistance is selected properly, the loss of the sense resistor is a small percentage of the total power loss. In this way, the AC and DC sides are grounded together to achieve the purpose of suppressing common mode interference.

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