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1 Introduction
As we all know, Class AB audio power amplifiers have higher efficiency than Class A (generally around 50%), and have lower crossover distortion than Class B [1], which is widely used in portable devices such as mobile phones and MP3s. The main power of the audio amplifier market.
The output op amp is the core part of the audio power amplifier chip, accounting for most of its layout area. Its performance and integration directly affect the performance parameters of the entire audio power amplifier chip and its area.
In recent years, with the wide application and continuous development of portable devices such as mobile phones, PDAs, MP3s, MP4s, etc., the requirements for audio power amplifier chips are also increasing. High performance, low power consumption and high integration are the direction of its development. This is also the requirement for the output op amp module.
Based on the N-well CM()S process, a 0.6 μm DP-DM process is used to design a small static power consumption, small input offset voltage, high gain, high common-mode rejection ratio and power supply rejection ratio, and large output. Swing, higher bandwidth, and THD's small output power op amps are available for most Class AB audio amplifier chips.
2 circuit design
The whole circuit is divided into two stages, the first stage is a differential input circuit, and the latter stage is a power tube push-pull output.
2.1 Selection of op amp structure
For output power op amps, the design focus is on the differential input circuit of the previous stage. It is desirable to have the highest possible open-loop gain and unity-gain frequency, while also considering speed, common-mode rejection ratio, power supply rejection ratio, power consumption, etc. Aspect performance limitations.
The cascode differential circuit has a high voltage gain, is comparable to a simple two-stage op amp, and has better frequency characteristics. Three different types of differential circuits were compared in [2]. Nowadays, the common cascode structures are sleeve type and folding type, as shown in Figure 1. Figure 1 (a) is a sleeve type cascode differential op amp, which has the advantages of good frequency characteristics and low power consumption [2]. The disadvantage is that there are too many "stacked" tubes on the branch, resulting in a small input common-mode level range and output swing, which is not suitable for operation at low voltages. Figure 1(b) shows a folded cascode differential op amp with a frequency characteristic comparable to that of a sleeve [2]. The main advantage of the sleeve type is that it has a larger input common mode level range because it does not "stack" a cascode tube and a larger output swing at the upper end of the input tube. The disadvantage is that the input requires a bias current to the tube and consumes more power.
From the application point of view, the above two voltage gain and frequency characteristics of the op amp structure, the sleeve structure requires a higher supply voltage, and the limitations in the input common mode level range, making him unsuitable for power amplifiers Input stage circuit. Despite the greater power consumption of the folded cascode structure, he is more suitable for the design requirements here. The minimum supply voltage he requested is also within acceptable limits.
2.2 Bias circuit
The low-voltage cascode current mirror structure adopted by the bias circuit not only has the advantages of ordinary cascode current mirror for accurately replicating current, but also can operate at a lower power supply voltage than a common cascode current mirror. [3]. as shown in picture 2.
The rms galvanic current mirrors M3 to M4 of this configuration consume a minimum voltage margin which is the sum of their overdrive voltages and can accurately mirror Iref. The input range of the bias voltage Vb is:
2.3 overall circuit
In the overall circuit of the operational amplifier of FIG. 3, FIG. 3(a) is the main body of the operational amplifier, including a differential input circuit and a push-pull output stage composed of power tubes Mp, Mn, and FIG. 3(b) is his bias. The circuit provides a bias voltage of Vb1 to Vb8.
The differential input circuit is a folded cascode structure. In the figure, M1 and M2 are input pair tubes, which are respectively "+" and "+" input terminals, and M3 and M4 are mirror parts of the low voltage cascode current mirror. A tail current source is provided. Compared with Fig. 1(b), the only difference is that M9, M10 and M15, M16 four tubes are inserted between the output terminals of the differential circuit, namely M8 and M13, and the single-ended output becomes double-ended, controlling two The gate voltage of the power transistor Mp, Mn makes Vgsp slightly smaller than Vthp at zero differential input, Vgsn is slightly smaller than Vthn, Mp, Mn all work in the subthreshold region, and a certain current flows. This is the basic feature of class AB amplifiers, eliminating crossover distortion as much as possible. In order to provide a large output current, their width to length ratio is large (the same number of tubes are connected in parallel on the layout, and the number of P tubes connected in parallel is about 3 times that of the N tube, so that the current flowing through the load in one cycle is equal. ).
In the case of differential input, when the "+" input is input to a higher level, the M2 branch current decreases rapidly, and the current flowing through the M5 and M7 branches remains equal, so the current flowing through M14 is less than the current flowing through M12. Forcing M14 to work in the linear region, the voltage at point Y is very low, and M13 enters the deep linear region in order to keep the branch current constant, and VB drops sharply. At the same time, M16, M15 branch current increases, M10, M9 branch current decreases, resulting in VA drop. Eventually, VB drops to a very low level, VA follows VB, M10, M9 cuts off, M16, M15 enters the linear zone. At this time, Mn is turned off and Mp is turned on. Similarly, when the "-" terminal inputs a higher level, Mn is turned on and Mp is turned off. The output voltage swing is:
The low frequency voltage gain of the op amp can be roughly calculated like this:
AV1 is the gain of the first stage differential circuit. M9, M10 and M15, M16 have little effect on the gain, and can ignore its effect, so:
AV2 is the gain of the second stage push-pull output stage:
In which the width to length ratio of the output power tube is adjusted so that Mp is about 3 times that of Mn, so that the above formula holds.
For such a multi-pole two-stage op amp, Miller compensation is performed in series with the output resistor and capacitor to increase the phase margin and improve stability. Through frequency compensation, the two main poles are [1]:
Where RA is the total impedance from point A (or B) to ground, CA is the total parasitic capacitance from point A to ground (C), and C1 is the total capacitance at the output.
P1 is closest to the origin and is the pole generated by point A; p2 is the pole of the output, far from the origin. At the same time, because the resistor and capacitor form a path, a zero point is generated [1]:
Appropriately adjust R so that Z = p2, canceled with the second main pole, increasing the bandwidth.
2.4 Working environment
It operates from a single power supply and operates in a closed loop state. The reference voltage is VDD/2. As shown in Figure 4. The closed loop transfer function is:
3 simulation results
The simulation performance parameters are shown in Table 1.
Figure 5 and Table 1 show the simulation results, both measured in open loop and no load. The simulation tool is Cadence Spectre, which uses a 0.6 μm N-well CMOS process model. The simulation environment is VDD=5 V, T=27°C, typical conditions. The above results show that the unity gain bandwidth GB is 7.941 MHz, the phase margin is 74.60, and the frequency characteristics are good; the offset voltage is very small, 38.92 μV; there is a higher voltage gain, common mode rejection ratio and power supply rejection ratio; When the input amplitude is 1 V and the sine wave is 1 kHz, the output THD is small, 0.004%.
4 Conclusion
The class AB output power amplifier circuit designed in this paper adopts the folded cascode structure, the power tube push-pull output, and the external current source is used for power supply. The bias circuit of the low-voltage cascode current mirror structure is adopted. The simulation structure shows that the op amp has high gain, low input offset voltage, low THD, etc., and has good frequency characteristics, low static power consumption, and meets the requirements of a high-performance class AB audio power amplifier chip. It can be seen that the design is almost satisfactory, and the slight adjustment can also make the tubes work in the most stable working area by changing the W/L ratio.
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