The thumb instruction set is a subset of the arm instruction set and is proposed for code density issues with a 16-bit code width. Compared with the equivalent 32-bit code, the thumb instruction set saves the storage space of the system while retaining the advantage of the 32-bit code. The thumb is not a complete architecture, and the processor cannot be expected to execute only the thumb instruction set and not the arm instruction set.
The thumb instruction set is divided into: branch instructions, data transfer instructions, single register load and store instructions, and multiple register load and store instructions. The thumb instruction set has no coprocessor instructions, semaphore instructions, and instructions to access cpsr or spsr.
The difference between the thumb instruction set and the arm instruction set
1, the thumb instruction inherits many of the features of the arm instruction set
The thumb instruction also uses the load/store structure, which has data processing, data transfer, and flow control instructions.
2, the thumb instruction set discarded some features of the arm instruction set
Most thumb instructions are executed unconditionally (except for branch instruction b), and all arm instructions are conditional. Many thumb data processing instructions use the 2-address format, ie the destination register is the same as a source register, and most arm data processing instructions use the 3-address format (except for 64-bit multiply instructions).
3, some characteristics of the performance of thumb anomaly
All exceptions cause the microprocessor to return to the arm mode state and process it in the arm's programming mode. Since the arm microprocessor word transfer address must be divisible by 4 (i.e., word aligned), the half word transfer address must be divisible by 2 (i.e., half word aligned). The thumb instruction is 2 bytes long, not 4 bytes. Therefore, the natural offset is different from arm when the thumb execution state enters the exception.
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