5 strokes to get PCB design impedance can not be continuous problem

Everyone knows that the impedance should be continuous, but, as Luo Yonghao said, "There are always times when you step on the stool." PCB design always has impedances that cannot be continuous. How to do?

Characteristic impedance: Also known as "characteristic impedance", it is not a DC resistance and is a concept in long-line transmission. In the high frequency range, during signal transmission, where the signal is arriving, the signal line and the reference plane (power or ground plane) will generate an instantaneous current due to the establishment of the electric field. If the transmission line is isotropic, then When the signal is transmitted, there is always a current I, and if the output level of the signal is V, during the signal transmission, the transmission line is equivalent to a resistor, the size is V/I, and this equivalent resistance is called The characteristic impedance Z of the transmission line. During the transmission of a signal, if the characteristic impedance of the transmission path changes, the signal will be reflected at the node where the impedance is discontinuous. Factors affecting the characteristic impedance are: dielectric constant, dielectric thickness, line width, and copper foil thickness.

[1] Gradient line

Some RF devices have smaller packages, SMD pad widths may be as small as 12 mils, and RF signal line widths may be more than 50 mils. A gradient line is used to disable line width abrupt changes. The gradient line is as shown in the figure, and the line of the transition part should not be too long.

[2] corner

If the RF signal line is at a right angle, the effective line width at the corner will increase, and the impedance will be discontinuous, causing signal reflection. In order to reduce discontinuities, there are two ways to handle the corners: chamfering and rounding. The radius of the arc angle should be large enough. In general, it must be guaranteed that R>3W. As shown on the right.

5 strokes to get PCB design impedance can not be continuous problem

[3] Large pad

When there is a large pad on the 50-ohm microstrip line, the large pad is equivalent to the distributed capacitance, which destroys the characteristic impedance continuity of the microstrip line. Two methods can be improved at the same time: firstly, the microstrip line medium is thickened, and secondly, the ground plane below the pad is hollowed out, which can reduce the distribution capacitance of the pad. As shown below.

[4] Via

A via is a metal cylinder that is plated outside the via between the top and bottom layers of the board. Signal vias connect the transmission lines on different layers. The via stub is the unused portion of the via. Via pads are ring-shaped pads that connect vias to the top or internal transmission lines. The isolation disk is an annular gap in each power or ground plane to prevent short circuits to the power and ground planes.

5 strokes to get PCB design impedance can not be continuous problem

Parasitic parameters of vias

After a rigorous physical theory derivation and approximation analysis, the equivalent circuit model of the via can be a series of grounding capacitors at each end of the inductor, as shown in Figure 1.

Passive circuit model

From the equivalent circuit model, the via hole itself has parasitic capacitance to ground. Assume that the via reverse pad diameter is D2, the via pad diameter is D1, the PCB board thickness is T, and the plate substrate dielectric constant is ε, the parasitic capacitance of the via is similar to:

The parasitic capacitance of the via can cause the signal rise time to be prolonged and the transmission speed to slow down, thereby degrading the signal quality. Similarly, vias also have parasitic inductance. In high-speed digital PCBs, the parasitic inductance is often more harmful than parasitic capacitance. Its parasitic series inductance weakens the contribution of the bypass capacitor, which reduces the filtering effectiveness of the entire power system. Let L be the inductance of the via, h the length of the via, and d the diameter of the center hole. The parasitic inductance of the via approximation approximates:

Vias are one of the important factors that cause impedance discontinuities on the RF channel. If the signal frequency is greater than 1 GHz, consider the effects of vias. Common methods for reducing the discontinuity of via impedance are: using a diskless process, selecting the outgoing mode, optimizing the anti-pad diameter, and the like. Optimizing the anti-pad diameter is one of the most common methods of reducing impedance discontinuities. Since the via characteristics are related to the size of the aperture, pad, anti-pad, stacked structure, and outgoing mode, it is recommended that the HFSS and OpTImetrics be optimized for each design. When using a parametric model, the modeling process is simple. At the time of the review, the PCB designer is required to provide the corresponding simulation documentation.

The diameter of the via, the pad diameter, the depth, and the anti-pad will change, causing impedance discontinuities, the severity of reflection and insertion loss.

[5] Through-hole coaxial connector

Similar to the via structure, the via coaxial connector also has impedance discontinuities, so the solution is the same as the via. A common method for reducing the discontinuity of the through-hole coaxial connector impedance is to use a diskless process, a suitable exit mode, and an optimized anti-pad diameter.

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